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Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems

Year : 2001 Volume number : 09 Issue: 06

Synthesis Of Hardware Models In C With Pointers And Complex Data Structures (Article)
Subject: Introduction , Methodology
Author: L. Semerjian      K Sato      D. Driller Micheal     
page:      743 - 756
Quantifying And Enhancing Power Awareness Of Vlsi Systems (Article)
Subject: Introduction , Quantifying Interlace
Author: A. Z Baraniecki      D Min      Mysore S Chandrakanth     
page:      757 - 772
Path Clustering In Software Timing Analysis (Article)
Subject: Introduction
Author: A Wolf      R. Ernst     
page:      773 - 782
Polynomial Circuits Models Of Copmponent Matching In High Level Synthesis (Article)
Subject: Introduction
Author: J. J Smith      G. De Micheli     
page:      783 - 800
Influence Of Compiler Optimizations On System Power (Article)
Subject: Introduction
Author: Jonathan Kandell      K Vijayaraghavan      M. J. Irwin      W Ye     
page:      801 - 804
Co-Ram: Combinational Logic Synthesis Applied To Software Partitions For Mapping To A Novel Memory Device (Article)
Subject: Introduction , Combinational Functions In Software
Author: S. L Weber      J. M Paul      D.E Thomas     
page:      805 - 812
Soft Digital Signal Processing (Article)
Subject: Dsm , Introduction
Author: R Hegde      N. R Shanbhad     
page:      813 - 823
Tao: Regular Expression-Based Register-Transfer Level Testability Analysis And Optimization (Article)
Subject: Introduction , Prespective On Test Analysis
Author: S. S Ravi      G Lakshminarayana      N.K Jha     
page:      824 - 832
Estimating Probabilistic Timming Performance For Real Time Embeded Systems (Article)
Subject: Introduction , Relaxing The Asumption
Author: X Hu      G. T. Zhou      Charles D Shackelford     
page:      833 - 844
Automatic Generation And Compaction Of March Tests For Memory Arrays (Article)
Subject: Introduction
Author: Kamran Zarrineh      S Upadhyaya      S Chakravarthy     
page:      845 - 857
A Framework For Reconfigurable Computing : Task Scheduling And Context Management (Article)
Subject: Introduction , Related Work
Author: C Mastrangelo      F. Kurdahi      R. Hermida      Nader Bagherzadeh     
page:      858 - 873
Efficient Exponentiation Using Weakly Dual Basis (Article)
Subject: Dual Basis , Urban Space , Mathematical Model
Author: H. T Wu      M. A Hasan     
page:      874 - 879
Parameterized Rtl Power Models For Soft Macros (Article)
Subject: Introduction , Preliminary Theory
Author: A Bogliolo      Fulvio Corno     
page:      880 - 887
Statical Clock Scew Modeling With Data Delay Variations (Article)
Subject: Introduction , Background
Author: D. K Harris      Urs Naf     
page:      888 - 898
Optimal N-Tier Multilevel Interconnect Architecture For Gigascale Integration(Gsi0 (Article)
Subject: Introduction , Multilevel Rectifier
Author: G Venkatesh      J. B Davison     
page:      899 - 912
A Differential Equation For Placement Analysis (Article)
Subject: Introduction , A Divertable Waste Stream
Author: P Christie     
page:      913 - 921
Impact Of Three Dimensional Architectures On Interconnects In Gigascale Integration (Article)
Subject: Introduction , Wire Rope Mechanics
Author: Scott Joyner      G. T Venkatesan     
page:      922 - 928
Buffer Block Planning For Interconnect Planning Aand Prediction (Article)
Subject: Introduction
Author: Jason Cong      D Stroobandt      David Van Campenhout     
page:      929 - 937
A Stochastic Model For The Interconnection Topology Of Digital Circuits (Article)
Subject: Introduction
Author: Luc Verpooten      D Stroobandt     
page:      938 - 942
Prelayout Estimation Of Individual Wire Lengths (Article)
Subject: Introduction
Author: J. B. Bodie      F. N Najm     
page:      943 - 958
Multilevel Reverse Most-Significant Carry Computation (Article)
Subject: Introduction
Author: J. D Bruguera      T Lang     
page:      959 - 962
Exploiting The On-Chip Inductance In High-Speed Clock Distribution Networks (Article)
Subject: Introduction
Author: Y. I Ismail      J Friedmann      Matasovic Neven     
page:      963 - 976
Bus Guardians: An Effective Solution For Online Detection And Correction Of Faults Affecting System -On-Chip Buses... (Article)
Subject: Introduction
Author: L. Gerin Lajoie     
page:      974 - 982
Cell-Based Layout Techneques Supporting Gate-Level Voltage Scaling For Low Power (Article)
Subject: Introduction , Msc Detection By Reverse-Carry Algorithms
Author: C Yeh      Y. S Kang     
page:      983 - 986